Searched refs:MC_BUSY (Results 1 – 7 of 7) sorted by relevance
268 while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { in smc_wait_mmu_release_complete()335 while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) in smc_reset()566 while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { in smc_send()585 while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { in smc_send()754 while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY ) in smc_rcv()760 while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY ) in smc_rcv()
508 #define MC_BUSY 1 /* When 1 the last release has not completed */ macro
114 #define MC_BUSY 1 /* only readable bit in the register */ macro
221 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \223 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
612 #define MC_BUSY 1 // When 1 the last release has not completed macro
53 # define MC_BUSY (1 << 5) macro
1331 # define MC_BUSY (1 << 5) macro