Searched refs:MCYCLECFGH_BIT_UINH (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/riscv/ | ||
| H A D | cpu_bits.h | 916 #define MCYCLECFGH_BIT_UINH BIT(28) macro |
| H A D | csr.c | 905 inh_avail_mask |= riscv_has_ext(env, RVU) ? MCYCLECFGH_BIT_UINH : 0; in write_mcyclecfgh() |