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Searched refs:L2CSR0_L2PE (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dreg_booke.h605 #define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ macro
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dstart.S731 lis r4, (L2CSR0_L2PE)@h
732 ori r4, r4, (L2CSR0_L2PE)@l
743 lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
H A Dcpu_init.c569 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE); in enable_cluster_l2()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h502 #define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ macro