Searched refs:KVM_REG_RISCV_TIMER (Results 1 – 7 of 7) sorted by relevance
263 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_TIMER); in timer_id_to_str()456 case KVM_REG_RISCV_TIMER: in print_reg()535 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(frequency),536 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(time),537 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(compare),538 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),557 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),
37 #define RISCV_TIMER_REG(name) __kvm_reg_id(KVM_REG_RISCV_TIMER, \
167 KVM_REG_RISCV_TIMER); in kvm_riscv_vcpu_get_reg_timer()207 KVM_REG_RISCV_TIMER); in kvm_riscv_vcpu_set_reg_timer()
755 KVM_REG_RISCV_TIMER | i; in copy_timer_reg_indices()1004 case KVM_REG_RISCV_TIMER: in kvm_riscv_vcpu_set_reg()1035 case KVM_REG_RISCV_TIMER: in kvm_riscv_vcpu_get_reg()
187 #define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT) macro
242 #define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT) macro
122 #define RISCV_TIMER_REG(name) kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \