Home
last modified time | relevance | path

Searched refs:ISR (Results 1 – 25 of 79) sorted by relevance

1234

/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c114 REG32(ISR, 0x1C)
116 FIELD(ISR, REACK, 22, 1) /* Receive enable acknowledge flag */
117 FIELD(ISR, TEACK, 21, 1) /* Transmit enable acknowledge flag */
118 FIELD(ISR, WUF, 20, 1) /* Wakeup from Stop mode flag */
119 FIELD(ISR, RWU, 19, 1) /* Receiver wakeup from Mute mode */
120 FIELD(ISR, SBKF, 18, 1) /* Send break flag */
121 FIELD(ISR, CMF, 17, 1) /* Character match flag */
122 FIELD(ISR, BUSY, 16, 1) /* Busy flag */
123 FIELD(ISR, ABRF, 15, 1) /* Auto Baud rate flag */
124 FIELD(ISR, ABRE, 14, 1) /* Auto Baud rate error */
[all …]
/openbmc/qemu/hw/net/
H A Dcadence_gem.c159 REG32(ISR, 0x24) /* Interrupt Status reg */
160 FIELD(ISR, TX_LOCKUP, 31, 1)
161 FIELD(ISR, RX_LOCKUP, 30, 1)
162 FIELD(ISR, TSU_TIMER, 29, 1)
163 FIELD(ISR, WOL, 28, 1)
164 FIELD(ISR, RECV_LPI, 27, 1)
165 FIELD(ISR, TSU_SEC_INCR, 26, 1)
166 FIELD(ISR, PTP_PDELAY_RESP_XMIT, 25, 1)
167 FIELD(ISR, PTP_PDELAY_REQ_XMIT, 24, 1)
168 FIELD(ISR, PTP_PDELAY_RESP_RECV, 23, 1)
[all …]
/openbmc/linux/drivers/net/wireless/ath/wil6210/
H A DKconfig20 bool "Use Clear-On-Read mode for ISR registers for wil6210"
24 ISR registers on wil6210 chip may operate in either
28 For ISR debug, use W1C (say n); is allows to monitor ISR
29 registers with debugfs. If COR were used, ISR would
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_usart-test.c39 REG32(ISR, 0x1C)
40 FIELD(ISR, REACK, 22, 1)
41 FIELD(ISR, TEACK, 21, 1)
42 FIELD(ISR, TXE, 7, 1)
43 FIELD(ISR, RXNE, 5, 1)
44 FIELD(ISR, ORE, 3, 1)
/openbmc/linux/arch/arc/kernel/
H A Dentry-compact.S145 ; Level 2 ISR: Can interrupt a Level 1 ISR
152 ; if L2 IRQ interrupted a L1 ISR, disable preemption
156 ; -L2 interrupts L1 (before L1 ISR could run)
180 ; setup params for Linux common ISR and invoke it
223 ; Level 1 ISR
343 ; if L2 IRQ interrupted an L1 ISR, we'd disabled preemption earlier
/openbmc/qemu/include/hw/misc/
H A Dxlnx-zynqmp-apu-ctrl.h23 REG32(ISR, 0x10)
24 FIELD(ISR, INV_APB, 0, 1)
/openbmc/u-boot/drivers/net/
H A Dax88180.c565 OUTW (dev, INW (dev, ISR), ISR); in ax88180_init()
580 ISR_Status = INW (dev, ISR); in ax88180_recv()
584 OUTW (dev, ISR_Status, ISR); in ax88180_recv()
600 ISR_Status = INW (dev, ISR); in ax88180_recv()
/openbmc/qemu/hw/net/can/
H A Dtrace-events2 xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) "ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x"
12 xlnx_canfd_update_irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) "%s: ISR: 0x%08x IER: 0…
/openbmc/u-boot/arch/x86/include/asm/
H A Di8259.h14 #define ISR 0x0 /* In-Service Register */ macro
/openbmc/qemu/tests/tcg/multiarch/
H A Dtest-aes-main.c.inc152 verify(&rounds[i].start, &t, "ISB+ISR");
166 verify(&rounds[i - 1].after_sr, &t, "ISB+ISR+AK+IMC");
178 verify(&rounds[i - 1].after_sr, &t, "ISB+ISR+IMC+AK");
/openbmc/linux/sound/pci/aw2/
H A Daw2-saa7146.c336 isr = READREG(ISR); in snd_aw2_saa7146_interrupt()
340 WRITEREG(isr, ISR); in snd_aw2_saa7146_interrupt()
H A Dsaa7146.h33 #define ISR 0x10C macro
/openbmc/linux/drivers/net/ethernet/realtek/
H A Datp.c618 int status = read_nibble(ioaddr, ISR); in atp_interrupt()
624 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */ in atp_interrupt()
637 write_reg_high(ioaddr, ISR, ISRh_RxErr); in atp_interrupt()
651 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK); in atp_interrupt()
/openbmc/linux/sound/pci/vx222/
H A Dvx222_ops.c174 vx_inl(chip, ISR); in vx2_test_xilinx()
183 vx_inl(chip, ISR); in vx2_test_xilinx()
194 vx_inl(chip, ISR); in vx2_test_xilinx()
203 vx_inl(chip, ISR); in vx2_test_xilinx()
/openbmc/linux/drivers/usb/serial/
H A Dio_16654.h34 #define ISR 2 // Interrupt Status Register (Read) macro
/openbmc/linux/include/media/drv-intf/
H A Dsaa7146.h55 saa7146_write(x, ISR, (y));
378 #define ISR 0x10C /* Interrupt status register */ macro
/openbmc/linux/sound/pci/
H A Datiixp_modem.c563 atiixp_write(chip, ISR, 0xffffffff); in snd_atiixp_chip_start()
579 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); in snd_atiixp_chip_stop()
1006 status = atiixp_read(chip, ISR); in snd_atiixp_interrupt()
1032 atiixp_write(chip, ISR, status); in snd_atiixp_interrupt()
/openbmc/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1708 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_rx_poll()
1794 queue_writel(queue, ISR, MACB_BIT(TCOMP)); in macb_tx_poll()
1848 status = queue_readl(queue, ISR); in macb_wol_interrupt()
1862 queue_writel(queue, ISR, MACB_BIT(WOL)); in macb_wol_interrupt()
1877 status = queue_readl(queue, ISR); in gem_wol_interrupt()
1891 queue_writel(queue, ISR, GEM_BIT(WOL)); in gem_wol_interrupt()
1907 status = queue_readl(queue, ISR); in macb_interrupt()
1919 queue_writel(queue, ISR, -1); in macb_interrupt()
1936 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_interrupt()
1948 queue_writel(queue, ISR, MACB_BI in macb_interrupt()
[all...]
/openbmc/linux/drivers/net/ethernet/
H A Dfealnx.c167 ISR = 0x34, /* interrupt status */ enumerator
897 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in netdev_open()
1086 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR), in netdev_timer()
1157 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in enable_rxtx()
1197 dev->name, ioread32(ioaddr + ISR)); in fealnx_tx_timeout()
1441 u32 intr_status = ioread32(ioaddr + ISR); in intr_handler()
1444 iowrite32(intr_status, ioaddr + ISR); in intr_handler()
1596 dev->name, ioread32(ioaddr + ISR)); in intr_handler()
/openbmc/linux/drivers/net/ethernet/via/
H A Dvia-velocity.h985 volatile __le32 ISR; /* 0x24 */ member
1147 #define mac_read_isr(regs) readl(&((regs)->ISR))
1148 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1149 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
/openbmc/linux/drivers/video/fbdev/i810/
H A Di810_regs.h47 #define ISR 0x020AC macro
/openbmc/linux/sound/drivers/vx/
H A Dvx_core.c128 err = vx_inb(chip, ISR); in vx_transfer_end()
287 if (vx_inb(chip, ISR) & ISR_ERR) { in vx_send_msg_nolock()
390 if (vx_inb(chip, ISR) & ISR_ERR) { in vx_send_rih_nolock()
/openbmc/linux/arch/m68k/68000/
H A Dints.c82 unsigned long pend = ISR; in process_int()
/openbmc/linux/sound/soc/intel/keembay/
H A Dkmb_platform.h40 #define ISR(x) (0x40 * (x) + 0x038) macro
/openbmc/linux/drivers/mtd/nand/raw/
H A Dtegra_nand.c45 #define ISR 0x08 macro
256 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_irq()
287 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_irq()
339 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_controller_abort()
340 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_controller_abort()

1234