Searched refs:IRQ_ENABLE_1 (Results 1 – 2 of 2) sorted by relevance
30 #define IRQ_ENABLE_1 0x10 /* Interrupt enable register 1 */ macro109 case IRQ_ENABLE_1: in bcm2835_ic_read()146 case IRQ_ENABLE_1: in bcm2835_ic_write()
37 #define IRQ_ENABLE_1 0x10 macro52 writel(RASPI3_IC_BASE + IRQ_ENABLE_1, 1 << gpu_irq_line); in bcm2835_dma_test_interrupt()