Searched refs:IMX6UL_CLK_PLL5_VIDEO (Results 1 – 3 of 3) sorted by relevance
42 #define IMX6UL_CLK_PLL5_VIDEO 29 macro
38 #define IMX6UL_CLK_PLL5_VIDEO 29 macro
192 hws[IMX6UL_CLK_PLL5_VIDEO] = imx_clk_hw_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); in imx6ul_clocks_init()