Searched refs:IMX6UL_CLK_PLL3_USB_OTG (Results 1 – 5 of 5) sorted by relevance
40 #define IMX6UL_CLK_PLL3_USB_OTG 27 macro
36 #define IMX6UL_CLK_PLL3_USB_OTG 27 macro
190 hws[IMX6UL_CLK_PLL3_USB_OTG] = imx_clk_hw_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); in imx6ul_clocks_init()539 clk_set_parent(hws[IMX6UL_CLK_SIM_PRE_SEL]->clk, hws[IMX6UL_CLK_PLL3_USB_OTG]->clk); in imx6ul_clocks_init()
142 <&clks IMX6UL_CLK_PLL3_USB_OTG>, <&clks IMX6UL_CLK_PERIPH>,692 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
640 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;