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Searched refs:IA32_MISC_ENABLE (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dmodel_206ax.h18 #define IA32_MISC_ENABLE 0x1a0 macro
/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dmodel_206ax.c309 msr = msr_read(IA32_MISC_ENABLE); in configure_misc()
313 msr_write(IA32_MISC_ENABLE, msr); in configure_misc()
/openbmc/linux/arch/x86/kernel/
H A Dverify_cpu.S75 # only call IA32_MISC_ENABLE when:
/openbmc/linux/drivers/platform/x86/
H A Dintel_ips.c78 #define IA32_MISC_ENABLE 0x1a0 macro
1311 rdmsrl(IA32_MISC_ENABLE, misc_en); in ips_detect_cpu()
/openbmc/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv30 …ta cache could be set to either adaptive mode or shared mode (check IA32_MISC_ENABLE bit 24 defini…
/openbmc/linux/Documentation/virt/kvm/
H A Dapi.rst7661 IA32_MISC_ENABLE[bit 18] (MWAIT) is set.
7664 IA32_MISC_ENABLE[bit 18] is cleared.