/openbmc/u-boot/arch/arm/include/asm/arch-stv0991/ |
H A D | hardware.h | 51 #define I2C2_BASE_ADDR 0x80402000UL macro
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/openbmc/u-boot/drivers/i2c/ |
H A D | mxc_i2c.c | 579 #if !defined(I2C2_BASE_ADDR) 580 #define I2C2_BASE_ADDR 0 macro 611 { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, 620 { 1, I2C2_BASE_ADDR, 0 },
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/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/ |
H A D | config.h | 53 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000) macro
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/openbmc/u-boot/arch/arm/mach-imx/ |
H A D | i2c-mxv7.c | 65 (void *)I2C2_BASE_ADDR,
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
H A D | soc.c | 284 #ifdef I2C2_BASE_ADDR in erratum_a009203() 285 ptr = (u8 __iomem *)(I2C2_BASE_ADDR + I2C_DEBUG_REG); in erratum_a009203()
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/openbmc/u-boot/arch/arm/include/asm/arch-mx35/ |
H A D | imx-regs.h | 34 #define I2C2_BASE_ADDR 0x43F98000 macro
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/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/ |
H A D | imx-regs.h | 88 #define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0X00003A000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | immap_lsch3.h | 51 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) macro
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H A D | immap_lsch2.h | 74 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx27/ |
H A D | imx-regs.h | 192 #define I2C2_BASE_ADDR (0x1D000 + IMX_IO_BASE) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/ |
H A D | imx-regs.h | 82 #define I2C2_BASE_ADDR 0x30A30000 macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx25/ |
H A D | imx-regs.h | 301 #define I2C2_BASE_ADDR (0x43F98000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
H A D | imx-regs.h | 108 #define I2C2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
H A D | imx-regs.h | 78 #define I2C2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00067000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx31/ |
H A D | imx-regs.h | 614 #define I2C2_BASE_ADDR 0x43F98000 macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | imx-regs.h | 264 #define I2C2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x24000) macro
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/openbmc/u-boot/arch/arm/include/asm/arch-mx7/ |
H A D | imx-regs.h | 174 #define I2C2_BASE_ADDR (AIPS3_OFF_BASE_ADDR+0x30000) macro
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