| /openbmc/u-boot/arch/arm/include/asm/arch-stv0991/ |
| H A D | hardware.h | 50 #define I2C1_BASE_ADDR 0x80401000UL macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/ |
| H A D | config.h | 52 #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01180000) macro
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | i2c-mxv7.c | 64 (void *)I2C1_BASE_ADDR,
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | soc.c | 279 #ifdef I2C1_BASE_ADDR in erratum_a009203()
280 ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG); in erratum_a009203()
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx35/ |
| H A D | imx-regs.h | 29 #define I2C1_BASE_ADDR 0x43F80000 macro
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| /openbmc/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 610 { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG },
619 { 0, I2C1_BASE_ADDR, 0 },
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| /openbmc/u-boot/arch/arm/include/asm/arch-s32v234/ |
| H A D | imx-regs.h | 87 #define I2C1_BASE_ADDR (AIPS1_BASE_ADDR + 0X000038000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
| H A D | immap_lsch3.h | 50 #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01000000) macro
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| H A D | immap_lsch2.h | 73 #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01180000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx27/ |
| H A D | imx-regs.h | 186 #define I2C1_BASE_ADDR (0x12000 + IMX_IO_BASE) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-imx8m/ |
| H A D | imx-regs.h | 81 #define I2C1_BASE_ADDR 0x30A20000 macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx25/ |
| H A D | imx-regs.h | 295 #define I2C1_BASE_ADDR (0x43F80000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 109 #define I2C1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | imx-regs.h | 77 #define I2C1_BASE_ADDR (AIPS0_BASE_ADDR + 0x00066000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-imx/ |
| H A D | imx-regs.h | 45 #define I2C1_BASE_ADDR (0x17000 + IMX_IO_BASE) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx31/ |
| H A D | imx-regs.h | 612 #define I2C1_BASE_ADDR 0x43f80000 macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
| H A D | imx-regs.h | 263 #define I2C1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x20000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx7/ |
| H A D | imx-regs.h | 173 #define I2C1_BASE_ADDR (AIPS3_OFF_BASE_ADDR+0x20000) macro
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