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Searched refs:HHI_SAR_CLK_CNTL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/meson/
H A Dgxbb.h113 #define HHI_SAR_CLK_CNTL 0x3D8 /* 0xf6 offset in data sheet */ macro
H A Dgxbb.c950 .offset = HHI_SAR_CLK_CNTL,
968 .offset = HHI_SAR_CLK_CNTL,
985 .offset = HHI_SAR_CLK_CNTL,
/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-gx.h113 #define HHI_SAR_CLK_CNTL 0x3D8 /* 0xf6 offset in data sheet */ macro
/openbmc/u-boot/drivers/clk/
H A Dclk_meson.c184 MESON_GATE(CLKID_SAR_ADC_CLK, HHI_SAR_CLK_CNTL, 8),