Home
last modified time | relevance | path

Searched refs:HHI_GP0_PLL_CNTL4 (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h21 #define HHI_GP0_PLL_CNTL4 0x4c macro
H A Dclock-gx.h22 #define HHI_GP0_PLL_CNTL4 0x4c /* 0x13 offset in data sheet */ macro
/openbmc/linux/drivers/clk/meson/
H A Daxg.h22 #define HHI_GP0_PLL_CNTL4 0x4c macro
H A Dgxbb.h23 #define HHI_GP0_PLL_CNTL4 0x4c /* 0x13 offset in data sheet */ macro
H A Dg12a.h28 #define HHI_GP0_PLL_CNTL4 0x050 macro
H A Dgxbb.c434 { .reg = HHI_GP0_PLL_CNTL4, .def = 0x0000500d },
482 { .reg = HHI_GP0_PLL_CNTL4, .def = 0xc000004d },
H A Daxg.c185 { .reg = HHI_GP0_PLL_CNTL4, .def = 0xc000004d },
H A Dg12a.c1619 { .reg = HHI_GP0_PLL_CNTL4, .def = 0x33771290 },