Home
last modified time | relevance | path

Searched refs:GPO (Results 1 – 22 of 22) sorted by relevance

/openbmc/u-boot/board/intel/cherryhill/
H A Dcherryhill.c29 GPIO_PAD_CONF("N48: GP_CAMERASB00", GPIO, M1, GPO, LOW,
32 GPIO_PAD_CONF("N53: GP_CAMERASB01", GPIO, M1, GPO, LOW,
35 GPIO_PAD_CONF("N46: GP_CAMERASB02", GPIO, M1, GPO, LOW,
38 GPIO_PAD_CONF("N51: GP_CAMERASB03", GPIO, M1, GPO, LOW,
41 GPIO_PAD_CONF("N56: GP_CAMERASB04", GPIO, M1, GPO, LOW,
44 GPIO_PAD_CONF("N45: GP_CAMERASB05", GPIO, M1, GPO, LOW,
47 GPIO_PAD_CONF("N49: GP_CAMERASB06", GPIO, M1, GPO, LOW,
50 GPIO_PAD_CONF("N54: GP_CAMERASB07", GPIO, M1, GPO, LOW,
53 GPIO_PAD_CONF("N47: GP_CAMERASB08", GPIO, M1, GPO, LOW,
56 GPIO_PAD_CONF("N52: GP_CAMERASB09", GPIO, M1, GPO, LOW,
[all …]
/openbmc/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-npcm8xx.c1316 #define GPO BIT(1) /* Not GPI */ macro
1373 …, MFSEL1, 9, cp1utxd, MFSEL6, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(2, 4) | GPO),
1374 …(43, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO),
1375 …b, MFSEL1, 28, nbu1crts, MFSEL6, 15, jtag2, MFSEL4, 0, tp_jtag3, MFSEL7, 13, j2j3, MFSEL5, 2, GPO),
1376 …5, hsi1c, MFSEL1, 4, jtag2, MFSEL4, 0, j2j3, MFSEL5, 2, tp_jtag3, MFSEL7, 13, none, NONE, 0, GPO),
1377 …6, hsi1c, MFSEL1, 4, jtag2, MFSEL4, 0, j2j3, MFSEL5, 2, tp_jtag3, MFSEL7, 13, none, NONE, 0, GPO),
1379 …(48, hsi2a, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO),
1380 …(49, hsi2a, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO),
1381 …(50, hsi2b, MFSEL1, 29, bu6, MFSEL5, 6, tp_uart, MFSEL7, 12, none, NONE, 0, none, NONE, 0, GPO),
1382 …(51, hsi2b, MFSEL1, 29, bu6, MFSEL5, 6, tp_uart, MFSEL7, 12, none, NONE, 0, none, NONE, 0, GPO),
[all …]
H A Dpinctrl-npcm7xx.c920 #define GPO 0x2 /* Not GPI */ macro
974 …7XX_PINCFG(42, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, DSTR(2, 4) | GPO),
980 NPCM7XX_PINCFG(48, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, GPO),
983 NPCM7XX_PINCFG(51, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO),
985 NPCM7XX_PINCFG(53, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO),
993 NPCM7XX_PINCFG(61, uart1, MFSEL1, 10, none, NONE, 0, none, NONE, 0, GPO),
994 NPCM7XX_PINCFG(62, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO),
995 NPCM7XX_PINCFG(63, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO),
1120 …X_PINCFG(184, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO),
1121 …X_PINCFG(185, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO),
[all …]
/openbmc/openbmc/meta-security/dynamic-layers/networking-layer/recipes-security/sssd/files/
H A DCVE-2023-3758.patch6 Currently after the evaluation of a single GPO file the intermediate
8 all applicable GPO files are evaluated. Finally the data in the cache is
197 * (as part of the GPO Result object in the sysdb cache).
207 /* ret is EOK only after all GPO policy files have been downloaded */
211 + DEBUG(SSSDBG_OP_FAILURE, "Failed to store evaluated GPO maps "
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dtwl6040.txt4 vibra and GPO functionality on OMAP4+ platforms.
13 - #gpio-cells = <1>: twl6040 provides GPO lines.
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio_lpc32xx.txt14 5: GPO P3
/openbmc/linux/Documentation/devicetree/bindings/mux/
H A Dadi,adgs1408.txt12 - First cell is the GPO line number, i.e. 0 to 3
H A Dadi,adg792a.txt13 - First cell is the GPO line number, i.e. 0 or 1
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h52 GPO = 1, /* GPO, output only in PAD_VALUE */ enumerator
/openbmc/linux/drivers/gpio/
H A DKconfig1125 tristate "PCA9570 4-Bit I2C GPO expander"
1127 Say yes here to enable the GPO driver for the NXP PCA9570 chip.
1158 tristate "TPIC2810 8-Bit I2C GPO expander"
1160 Say yes here to enable the GPO driver for the TI TPIC2810 chip.
1202 Support for GPO(s) on ROHM BD71815 PMIC. There are two GPOs
1342 tristate "TI LP873X GPO"
1345 This driver supports the GPO on TI Lp873x PMICs. 2 GPOs are present
1457 tristate "TI TPS65086 GPO"
1460 This driver supports the GPO on TI TPS65086x PMICs.
1479 GPIO. It's either a GPO when MULTI_DEVICE_EN=0 or a GPI when
[all …]
/openbmc/linux/drivers/net/wan/
H A Dhd64572.h96 #define GPO 0x131 /* General Purpose Output Pin Ctl Reg */ macro
/openbmc/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gsj.dts437 /* GPO pins*/
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Ddove-cm-a510.dtsi100 /* Set upper NAND data bit to GPO */
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg20 # bit 31-28: MPPSel7 0, GPO[7]
H A Dkwbimage-memphis.cfg23 # bit 31-28: MPPSel7 0, GPO[7]
H A Dkwbimage_256M8_1.cfg27 # bit 31-28: 0, MPPSel7 GPO[7]
H A Dkwbimage_128M16_1.cfg27 # bit 31-28: 0, MPPSel7 GPO[7]
/openbmc/linux/Documentation/hwmon/
H A Ducd9000.rst54 (MARx), 16 for logical GPO, and 32 GPIs for cascading, and system function.
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-bk4.dts343 /* GPO */
/openbmc/qemu/hw/usb/
H A Dhcd-dwc3.c124 FIELD(GGPIO, GPO, 16, 16)
/openbmc/linux/drivers/hid/
H A DKconfig910 bool "GPO via leds class" if EXPERT
915 Provide access to PicoLCD's GPO pins via leds class.
/openbmc/linux/drivers/mfd/
H A DKconfig1641 General Purpose Outputs (GPO) that are used in portable devices.
1655 General Purpose Outputs (GPO) that are used in portable devices.