Home
last modified time | relevance | path

Searched refs:GICState (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/hw/intc/
H A Darm_gic_common.c33 GICState *s = (GICState *)opaque; in gic_pre_save()
45 GICState *s = (GICState *)opaque; in gic_post_load()
56 GICState *s = (GICState *)opaque; in gic_virt_state_needed()
84 VMSTATE_UINT32_ARRAY(h_hcr, GICState, GIC_NCPU),
85 VMSTATE_UINT32_ARRAY(h_misr, GICState, GIC_NCPU),
86 VMSTATE_UINT32_2DARRAY(h_lr, GICState, GIC_MAX_LR, GIC_NCPU),
87 VMSTATE_UINT32_ARRAY(h_apr, GICState, GIC_NCPU),
90 VMSTATE_UINT32_SUB_ARRAY(cpu_ctlr, GICState, GIC_NCPU, GIC_NCPU),
91 VMSTATE_UINT16_SUB_ARRAY(priority_mask, GICState, GIC_NCPU, GIC_NCPU),
92 VMSTATE_UINT16_SUB_ARRAY(running_priority, GICState, GIC_NCPU, GIC_NCPU),
[all …]
H A Darm_gic.c59 static inline int gic_get_current_cpu(GICState *s) in gic_get_current_cpu()
67 static inline int gic_get_current_vcpu(GICState *s) in gic_get_current_vcpu()
75 static inline bool gic_has_groups(GICState *s) in gic_has_groups()
80 static inline bool gic_cpu_ns_access(GICState *s, int cpu, MemTxAttrs attrs) in gic_cpu_ns_access()
85 static inline void gic_get_best_irq(GICState *s, int cpu, in gic_get_best_irq()
110 static inline void gic_get_best_virq(GICState *s, int cpu, in gic_get_best_virq()
142 static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt, in gic_irq_signaling_enabled()
164 static inline void gic_update_internal(GICState *s, bool virt) in gic_update_internal()
227 static void gic_update(GICState *s) in gic_update()
250 static inline void gic_extract_lr_info(GICState *s, int cpu, in gic_extract_lr_info()
[all …]
H A Darm_gic_kvm.c35 DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass,
77 GICState *s = (GICState *)opaque; in kvm_arm_gicv2_set_irq()
82 static bool kvm_arm_gic_can_save_restore(GICState *s) in kvm_arm_gic_can_save_restore()
93 static void kvm_gicd_access(GICState *s, int offset, int cpu, in kvm_gicd_access()
100 static void kvm_gicc_access(GICState *s, int offset, int cpu, in kvm_gicc_access()
114 typedef void (*vgic_translate_fn)(GICState *s, int irq, int cpu,
120 static void translate_clear(GICState *s, int irq, int cpu, in translate_clear()
131 static void translate_group(GICState *s, int irq, int cpu, in translate_group()
145 static void translate_enabled(GICState *s, int irq, int cpu, in translate_enabled()
159 static void translate_pending(GICState *s, int irq, int cpu, in translate_pending()
[all …]
H A Dgic_internal.h162 uint32_t gic_acknowledge_irq(GICState *s, int cpu, MemTxAttrs attrs);
163 void gic_dist_set_priority(GICState *s, int cpu, int irq, uint8_t val,
166 static inline bool gic_test_pending(GICState *s, int irq, int cm) in gic_test_pending()
198 static inline bool gic_virq_is_valid(GICState *s, int irq, int vcpu) in gic_virq_is_valid()
229 static inline uint32_t *gic_get_lr_entry(GICState *s, int irq, int vcpu) in gic_get_lr_entry()
246 static inline bool gic_test_group(GICState *s, int irq, int cpu) in gic_test_group()
256 static inline void gic_clear_pending(GICState *s, int irq, int cpu) in gic_clear_pending()
271 static inline void gic_set_active(GICState *s, int irq, int cpu) in gic_set_active()
281 static inline void gic_clear_active(GICState *s, int irq, int cpu) in gic_clear_active()
316 static inline int gic_get_priority(GICState *s, int irq, int cpu) in gic_get_priority()
/openbmc/qemu/include/hw/intc/
H A Darm_gic_common.h65 struct GICState { struct
137 struct GICState *backref[GIC_NCPU]; argument
150 typedef struct GICState GICState; argument
154 DECLARE_OBJ_CHECKERS(GICState, ARMGICCommonClass,
162 void (*pre_save)(GICState *s);
163 void (*post_load)(GICState *s);
166 void gic_init_irqs_and_mmio(GICState *s, qemu_irq_handler handler,
H A Drealview_gic.h25 GICState gic;
H A Darm_gic.h78 DECLARE_OBJ_CHECKERS(GICState, ARMGICClass,
/openbmc/qemu/include/hw/arm/
H A Dbcm2838.h28 GICState gic;
H A Dallwinner-h3.h146 GICState gic;
H A Dallwinner-r40.h129 GICState gic;
H A Dxlnx-zynqmp.h105 GICState gic;
/openbmc/qemu/include/hw/cpu/
H A Da15mpcore.h41 GICState gic;
H A Darm11mpcore.h30 GICState gic;
H A Da9mpcore.h33 GICState gic;