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Searched refs:GCC_USB3_PHY_SEC_BCR (Results 1 – 25 of 31) sorted by relevance

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/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h151 #define GCC_USB3_PHY_SEC_BCR 7 macro
H A Dqcom,qdu1000-gcc.h167 #define GCC_USB3_PHY_SEC_BCR 22 macro
H A Dqcom,sm7150-gcc.h170 #define GCC_USB3_PHY_SEC_BCR 8 macro
H A Dqcom,gcc-sm8450.h229 #define GCC_USB3_PHY_SEC_BCR 30 macro
H A Dqcom,sm8550-gcc.h213 #define GCC_USB3_PHY_SEC_BCR 29 macro
H A Dqcom,gcc-sm8150.h232 #define GCC_USB3_PHY_SEC_BCR 19 macro
H A Dqcom,gcc-sdm845.h225 #define GCC_USB3_PHY_SEC_BCR 20 macro
H A Dqcom,gcc-sm8350.h245 #define GCC_USB3_PHY_SEC_BCR 31 macro
H A Dqcom,gcc-sm8250.h251 #define GCC_USB3_PHY_SEC_BCR 39 macro
H A Dqcom,gcc-sc8180x.h282 #define GCC_USB3_PHY_SEC_BCR 29 macro
H A Dqcom,sa8775p-gcc.h296 #define GCC_USB3_PHY_SEC_BCR 34 macro
H A Dqcom,gcc-sc8280xp.h460 #define GCC_USB3_PHY_SEC_BCR 58 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sc7180.c2381 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-qdu1000.c2611 [GCC_USB3_PHY_SEC_BCR] = { 0x6000c },
H A Dgcc-sm7150.c2919 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sm8450.c3201 [GCC_USB3_PHY_SEC_BCR] = { 0x6000c },
H A Dgcc-sm8250.c3575 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sm8550.c3275 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sm8150.c3731 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sm8350.c3742 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sdm845.c3893 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
H A Dgcc-sa8775p.c4696 [GCC_USB3_PHY_SEC_BCR] = { 0x5c00c },
H A Dgcc-sc8180x.c4472 [GCC_USB3_PHY_SEC_BCR] = { 0x50018 },
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi1659 resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
H A Dsc8180x.dtsi2493 <&gcc GCC_USB3_PHY_SEC_BCR>;

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