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Searched refs:GCC_PCIE_1_NOCSR_COM_PHY_BCR (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,sdx75-gcc.h172 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 5 macro
H A Dqcom,gcc-sm8450.h210 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 11 macro
H A Dqcom,sm8550-gcc.h194 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 10 macro
H A Dqcom,gcc-sm8350.h225 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 11 macro
H A Dqcom,gcc-sm8250.h223 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 11 macro
H A Dqcom,sa8775p-gcc.h276 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 14 macro
H A Dqcom,gcc-sc8280xp.h410 #define GCC_PCIE_1_NOCSR_COM_PHY_BCR 8 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sdx75.c2868 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x56120 },
H A Dgcc-sm8450.c3182 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x9e020 },
H A Dgcc-sm8250.c3547 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
H A Dgcc-sm8550.c3256 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
H A Dgcc-sm8350.c3722 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
H A Dgcc-sa8775p.c4676 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0xae090 },
H A Dgcc-sc8280xp.c7382 [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8550.dtsi1847 <&gcc GCC_PCIE_1_NOCSR_COM_PHY_BCR>;