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/openbmc/phosphor-bmc-code-mgmt/
H A Dflash.hpp18 class Flash class
21 Flash() = default;
22 Flash(const Flash&) = delete;
23 Flash& operator=(const Flash&) = delete;
24 Flash(Flash&&) = default;
25 Flash& operator=(Flash&&) = delete;
28 virtual ~Flash() = default;
/openbmc/qemu/hw/block/
H A Dm25p80.c479 struct Flash { struct
534 OBJECT_DECLARE_TYPE(Flash, M25P80Class, M25P80) in OBJECT_DECLARE_TYPE() argument
536 static inline Manufacturer get_man(Flash *s) in OBJECT_DECLARE_TYPE()
569 static void flash_sync_page(Flash *s, int page) in flash_sync_page()
585 static inline void flash_sync_area(Flash *s, int64_t off, int64_t len) in flash_sync_area()
600 static void flash_erase(Flash *s, int offset, FlashCMD cmd) in flash_erase()
652 static inline void flash_sync_dirty(Flash *s, int64_t newpage) in flash_sync_dirty()
661 void flash_write8(Flash *s, uint32_t addr, uint8_t data) in flash_write8()
709 static inline int get_addr_length(Flash *s) in get_addr_length()
737 static void complete_collecting_data(Flash *s) in complete_collecting_data()
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/images/firmware-image-juno/
H A Dimages-r0.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r2.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r1.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
/openbmc/linux/drivers/mtd/spi-nor/controllers/
H A DKconfig3 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
10 tristate "NXP SPI Flash Interface (SPIFI)"
14 Enable support for the NXP LPC SPI Flash Interface controller.
17 Flash. Enable this option if you have a device with a SPIFI
18 controller and want to access the Flash as a mtd device.
/openbmc/u-boot/doc/
H A DREADME.sha15 This SHA1 sum is used, to check, if the U-Boot Image in Flash is not
16 calculates and prints the SHA1 sum, from the Image stored in Flash
19 check, if the SHA1 sum from the Image stored in Flash is correct
26 If you want to store a new Image in Flash for the pcs440ep board,
30 (for this example we use the Image from Flash, stored at 0xfffa0000 and
36 The SHA1 sum is stored in Flash at:
38 for the pcs440ep Flash: 0xfffa0000 + 0x60000 + -0x20
H A DREADME.update8 server in NOR Flash. In more detail: a TFTP transfer of a file given in
11 updates. Each update in the update file has an address in NOR Flash where it
14 verification is positive, the update is stored in Flash.
21 Note that when enabling auto-update, Flash support must be turned on. Also,
70 'update_uboot.its' file is where the U-Boot is stored in Flash, the
84 automatically stored in Flash.
87 file is a good, working image. Also make sure that the address in Flash
94 ramdisk and FDT blob stored in Flash. The procedure for preparing the update
H A DREADME.cfi55 CONFIG_SYS_MAX_FLASH_SECT: Number of sectors available on Flash device
59 CONFIG_CMD_FLASH: Enables Flash command library
61 CONFIG_FLASH_CFI_DRIVER: Enables CFI Flash driver
63 CONFIG_FLASH_CFI_MTD: Enables MTD frame work for NOR Flash devices
/openbmc/linux/Documentation/leds/
H A Dleds-lm3556.rst6 1.5 A Synchronous Boost LED Flash Driver w/ High-Side Current Source
16 There are 3 functions in LM3556, Flash, Torch and Indicator.
18 Flash Mode
21 In Flash Mode, the LED current source(LED) provides 16 target current levels
22 from 93.75 mA to 1500 mA.The Flash currents are adjusted via the CURRENT
23 CONTROL REGISTER(0x09).Flash mode is activated by the ENABLE REGISTER(0x0A),
26 LM3556 Flash can be controlled through /sys/class/leds/flash/brightness file
31 Flash Example:
/openbmc/u-boot/board/Arcturus/ucp1020/
H A DREADME3 DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash.
15 SPI Flash or NOR flash
47 NOR Flash Partition declarations and scripts
/openbmc/linux/drivers/scsi/cxlflash/
H A DKconfig3 # IBM CXL-attached Flash Accelerator SCSI Driver
7 tristate "Support for IBM CAPI Flash"
12 Allows CAPI Accelerated IO to Flash
/openbmc/u-boot/board/davinci/da8xxevm/
H A DKconfig18 bool "MAC address in SPI Flash"
22 their MAC address in SPI Flash from the factory
23 Enable this option to read the MAC from SPI Flash
29 their MAC address in SPI Flash from the factory,
/openbmc/skeleton/flashbios/
H A Dflash_bios_obj.c27 update(Flash* flash, const char* obj_path) in update()
44 on_init(Flash *f, in on_init()
113 on_update_via_tftp(Flash *flash, in on_update_via_tftp()
138 on_error(Flash *flash, in on_error()
155 on_done(Flash *flash, in on_done()
178 on_update(Flash *flash, in on_update()
220 Flash *flash = object_get_flash((Object*)user_data); in on_flash_progress()
254 Flash* flash = flash_skeleton_new(); in on_bus_acquired()
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dnxp-spifi.txt1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
6 mode. In memory mode the Flash is accessible from the CPU as
21 The SPI Flash must be a child of the SPIFI node and must have a
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME41 - Integrated Flash memory controller (IFC)
58 128Mbyte 2K page size NAND Flash
60 128 Mbit SPI Flash memory
81 1. NOR Flash
82 2. NAND Flash
93 1. NOR Flash
96 2. NAND Flash : It is currently not supported
97 3. SPI Flash
107 0x8000_0000 0x8FFF_FFFF NOR Flash 256M
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME40 . Integrated Flash memory controller (IFC)
65 128Mbyte 2K page size NAND Flash
67 128 Mbit SPI Flash memory
82 1. NAND Flash
83 2. SPI Flash
92 1. NAND Flash with sysclk 66MHz(J16 on RDB closed, default)
94 2. NAND Flash with sysclk 100MHz(J16 on RDB open)
96 3. SPI Flash with sysclk 66MHz(J16 on RDB closed, default)
98 4. SPI Flash with sysclk 100MHz(J16 on RDB open)
/openbmc/u-boot/board/freescale/ls1012ardb/
H A DREADME42 a) QSPI Flash Emu Boot
43 b) QSPI Flash 1
44 c) QSPI Flash 2
48 Images | Size |QSPI Flash Address
86 QSPI Flash
90 Images | Size |QSPI Flash Address
/openbmc/qemu/docs/system/arm/
H A Dsx1.rst10 -pflash) V1 1 Flash of 16MB and 1 Flash of 8MB V2 1 Flash of 32MB
/openbmc/linux/drivers/mtd/maps/
H A DKconfig13 tristate "Flash device in physical memory map"
16 This provides a 'mapping' driver which allows the NOR Flash and
73 This provides a 'mapping' driver which allows the NOR Flash, ROM
122 bool "GPIO-assisted Flash Chip Support"
140 tristate "CFI Flash device mapped on AMD SC520 CDP"
148 tristate "CFI Flash device mapped on AMD NetSc520"
156 tristate "JEDEC Flash device mapped on Technologic Systems TS-5500"
174 tristate "CFI Flash device mapped on Arcom SBC-GXx boards"
185 tristate "CFI Flash device mapped on Intel XScale PXA2xx based boards"
191 tristate "Flash device mapped with DOCCS on NatSemi SCx200"
[all …]
/openbmc/linux/drivers/mtd/nand/onenand/
H A DKconfig21 tristate "OneNAND Flash device via platform device driver"
47 One Block of the NAND Flash Array memory is reserved as
49 Also, 1st Block of NAND Flash Array can be used as OTP.
52 operations as any other NAND Flash Array memory block.
62 Flash memory array, these two component enables simultaneous program
/openbmc/u-boot/board/freescale/ls1012aqds/
H A DREADME47 a) QSPI Flash Emu Boot
48 b) QSPI Flash 1
49 c) QSPI Flash 2
53 Images | Size |QSPI Flash Address
/openbmc/skeleton/libopenbmc_intf/
H A Dopenbmc_intf.h2968 #define FLASH(o) (G_TYPE_CHECK_INSTANCE_CAST ((o), TYPE_FLASH, Flash))
2973 typedef struct _Flash Flash; typedef
2983 Flash *object,
2987 Flash *object,
2992 Flash *object,
2996 Flash *object,
3001 Flash *object,
3006 const gchar * (*get_filename) (Flash *object);
3008 const gchar * (*get_flasher_instance) (Flash *object);
3010 const gchar * (*get_flasher_name) (Flash *object);
[all …]
/openbmc/u-boot/board/cadence/xtfpga/
H A DREADME26 - 16MB / 4MB (LX60) Linear Flash
32 - 16MB Linear BPI Flash
38 - 128MB Linear BPI Flash
58 reset vector resides) to either SRAM (off, 0, down) or Flash
69 intended for the Flash. This issues is discussed in a separate
73 has been programmed into the first two 64 KB sectors of the Flash.
75 The Flash is always mapped at a device (memory mapped I/O) address
92 has been saved to Flash by the "saveenv" command, this will be
/openbmc/openbmc/meta-fii/meta-mori/recipes-bsp/u-boot/u-boot-fw-utils-nuvoton/
H A Dfw_env.config5 # Futhermore, if the Flash sector size is ommitted, this value is assumed to
9 # MTD device name Device offset Env. size Flash sector size Number of sectors
13 # MTD device name Device offset Env. size Flash sector size Number of sectors

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