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Searched refs:DWC3_GCTL_CORESOFTRESET (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
/openbmc/u-boot/include/linux/usb/
H A Ddwc3.h169 #define DWC3_GCTL_CORESOFTRESET (1 << 11) macro
/openbmc/u-boot/drivers/usb/dwc3/
H A Dcore.c55 reg |= DWC3_GCTL_CORESOFTRESET; in dwc3_core_soft_reset()
84 reg &= ~DWC3_GCTL_CORESOFTRESET; in dwc3_core_soft_reset()
H A Dcore.h153 #define DWC3_GCTL_CORESOFTRESET (1 << 11) macro
/openbmc/linux/drivers/usb/dwc3/
H A Dcore.c207 reg |= DWC3_GCTL_CORESOFTRESET; in __dwc3_set_mode()
219 reg &= ~DWC3_GCTL_CORESOFTRESET; in __dwc3_set_mode()
H A Dcore.h255 #define DWC3_GCTL_CORESOFTRESET BIT(11) macro