Searched refs:DSA (Results 1 – 25 of 46) sorted by relevance
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5 This document describes the **Distributed Switch Architecture (DSA)** subsystem23 or more CPU or management ports. The DSA subsystem currently relies on the28 be later referred to as "master" and "cpu" in DSA terminology and code.30 The D in DSA stands for Distributed, because the subsystem has been designed33 ports are referred to as "dsa" ports in DSA terminology and code. A collection36 For each front-panel port, DSA creates specialized network devices which are39 interfaces in DSA terminology and code.41 The ideal case for using DSA is when an Ethernet switch supports a "switch tag"54 Note that DSA does not currently create network interfaces for the "cpu" and68 DSA supports many vendor-specific tagging protocols, one software-defined[all …]
4 DSA switch configuration from userspace7 The DSA switch configuration is not integrated into the main userspace15 To configure a DSA switch a couple of commands need to be executed. In this32 Through DSA every port of a switch is handled like a normal linux Ethernet42 - when a DSA slave interface is brought up, the master interface is44 - when the master interface is brought down, all DSA slave interfaces are88 DSA switches. These switches are capable to tag incoming and outgoing traffic302 The existing DSA switches do not have the necessary hardware support to keep308 Up until kernel v4.14, DSA only supported user space management of bridge FDB319 Due to a bug, the bridge bypass FDB implementation provided by DSA did not[all …]
41 The driver is located in ``drivers/net/dsa/bcm_sf2.c`` and is implemented as a DSA51 Overall, the SF2 driver is a fairly regular DSA driver; there are a few57 The DSA platform device driver is probed using a specific compatible string58 provided in ``net/dsa/dsa.c``. The reason for that is because the DSA subsystem gets59 registered as a platform device driver currently. DSA will provide the needed70 Broadcom switches connected to a SF2 require the use of the DSA slave MDIO bus74 "double" programming. Using DSA, and setting ``ds->phys_mii_mask`` accordingly, we
13 The driver is implemented as a DSA driver, see ``Documentation/networking/dsa/dsa.rst``.21 interfaces (which is the default state of a DSA device). Due to HW limitations,
17 DSA driver; see ``Documentation/networking/dsa/dsa.rst`` for details on the36 DSA driver and will work like all DSA drivers which supports tagging.
7 tagging protocol used by the DSA network devices that are10 attached DSA switches, if this operation is supported by the11 driver. Changing the tagging protocol must be done with the DSA
7 perf_event_attr.config1 for the IDXD DSA pmu. (See also13 IDXD DSA Spec for possible attribute values)::29 IDXD DSA pmu is bound for access to all dsa pmu
13 DSA, enumerator57 {SSHKeyType::DSA, "DSA"},
32 the SJA1105 DSA driver.41 engine in the SJA1105 DSA driver, which is controlled using a
634 3.2.1 DSA (Distributed Switch Architecture) switches639 a port multiplier with optional forwarding acceleration features. Each DSA644 When a DSA switch is attached to a host port, PTP synchronization has to646 jitter between the host port and its PTP partner. For this reason, some DSA649 measure wire and PHY propagation latencies. Timestamping DSA switches are651 for the fact that the DSA interfaces are in fact virtual in terms of network653 interfaces of a DSA switch to share the same PHC.655 By design, PTP timestamping with a DSA switch does not need any special657 host port also supports PTP timestamping, DSA will take care of intercepting661 anybody else except for the DSA switch port must be prevented from doing so.[all …]
76 tristate "Tag driver for Marvell switches using DSA headers"80 Marvell switches which use DSA headers.83 tristate "Tag driver for Marvell switches using EtherType DSA headers"87 Marvell switches which use EtherType DSA headers.
4 NSS=Flags=internal,critical trustOrder=75 cipherOrder=100 slotParams=(1={slotFlags=[ECC,RSA,DSA,DH,…
3 and DSA certificates)"
50 The read buffers represent resources within the DSA52 support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.127 device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.283 Description: Enable the use of global read buffer limit for the group. See DSA293 by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read303 engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers
11 Example using the old DSA DeviceTree binding:
1 Hisilicon DSA Fabric device controller12 - interrupts: should contain the DSA Fabric and rcb interrupt.
24 used by switchdev as well as by DSA drivers.
20 tristate "DSA mock-up Ethernet switch chip support"25 exercises the DSA APIs.
21 Note: always use 'reg = <0/1/2>;' for the three DSA ports, even if the device is
43 and subnodes of DSA switches.
1 Marvell DSA Switch Device Tree Bindings
192 * BCM53134 is added to "bcm53xx" DSA driver.
93 * of Realtek DSA switch on the board.
228 /* eth1 is connected to the switch at port 6. However DSA only supports a
218 * Enable the elliptic curve DSA library.