| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_training_128b_132b.c | 44 DP_TRAINING_LANE0_SET, in dpcd_128b_132b_set_lane_settings()
50 DP_TRAINING_LANE0_SET, in dpcd_128b_132b_set_lane_settings()
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| H A D | link_dp_training.c | 1120 lane0_set_address = DP_TRAINING_LANE0_SET; in dpcd_set_lane_settings()
1203 &dpcd_lt_buffer[DP_TRAINING_LANE0_SET - DP_TRAINING_PATTERN_SET], in dpcd_set_lt_pattern_and_lane_settings()
1256 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings()
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| /openbmc/u-boot/include/linux/ |
| H A D | drm_dp_helper.h | 181 #define DP_TRAINING_LANE0_SET 0x103 macro
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| /openbmc/u-boot/drivers/video/tegra124/ |
| H A D | dp.c | 1065 tegra_dc_dp_dpcd_write(dp, (DP_TRAINING_LANE0_SET + cnt), val); in tegra_dp_lt_config()
1256 tegra_dc_dp_dpcd_write(dp, DP_TRAINING_LANE0_SET + j, 0x24); in tegra_dc_dp_fast_link_training()
1276 tegra_dc_dp_dpcd_write(dp, DP_TRAINING_LANE0_SET + j, 0x24); in tegra_dc_dp_fast_link_training()
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| /openbmc/linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | analogix_dp_core.c | 320 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, in analogix_dp_link_start()
531 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_clock_recovery()
605 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_equalizer_training()
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | atombios_dp.c | 511 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
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| /openbmc/linux/drivers/gpu/drm/tegra/ |
| H A D | dp.c | 489 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes); in drm_dp_link_apply_training()
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | atombios_dp.c | 561 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
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| /openbmc/linux/include/drm/display/ |
| H A D | drm_dp.h | 586 #define DP_TRAINING_LANE0_SET 0x103 macro
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_link_training.c | 612 DP_TRAINING_LANE0_SET : in intel_dp_update_link_train()
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| H A D | intel_dp.c | 3995 drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_process_phy_request()
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| /openbmc/linux/drivers/gpu/drm/xlnx/ |
| H A D | zynqmp_dp.c | 647 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->train_set, in zynqmp_dp_update_vs_emph()
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| /openbmc/linux/drivers/gpu/drm/bridge/ |
| H A D | ite-it6505.c | 1677 it6505_dpcd_write(it6505, DP_TRAINING_LANE0_SET + i, in step_train_lane_voltage_para_set()
1681 it6505_dpcd_read(it6505, DP_TRAINING_LANE0_SET + i)) in step_train_lane_voltage_para_set()
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| H A D | tc358767.c | 1101 ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); in tc_main_link_enable()
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| /openbmc/linux/drivers/gpu/drm/gma500/ |
| H A D | cdv_intel_dp.c | 1386 DP_TRAINING_LANE0_SET, in cdv_intel_dplink_set_level()
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| /openbmc/linux/drivers/gpu/drm/msm/dp/ |
| H A D | dp_ctrl.c | 1045 ret = drm_dp_dpcd_write(ctrl->aux, DP_TRAINING_LANE0_SET, in dp_ctrl_update_vx_px()
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| /openbmc/linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_dp.c | 1444 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_LANE0_SET + lane, in mtk_dp_train_update_swing_pre()
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