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Searched refs:DPIO_CH0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c1149 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1150 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1151 MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1152 MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1153 MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1154 MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1155 MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1156 MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1157 MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
1158 MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0)); in iterate_bxt_mmio()
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c1321 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1322 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1323 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1329 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0) | in assert_chv_phy_status()
1330 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1331 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1337 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) in assert_chv_phy_status()
1338 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1345 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1347 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
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H A Dintel_dpio_phy.c171 [DPIO_CH0] = { .port = PORT_B },
181 [DPIO_CH0] = { .port = PORT_A },
194 [DPIO_CH0] = { .port = PORT_B },
204 [DPIO_CH0] = { .port = PORT_A },
214 [DPIO_CH0] = { .port = PORT_C },
252 if (port == phy_info->channel[DPIO_CH0].port) { in bxt_port_to_phy_channel()
254 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
269 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
649 return DPIO_CH0; in vlv_dig_port_to_channel()
677 return DPIO_CH0; in vlv_pipe_to_channel()
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H A Dintel_dpio_phy.h19 DPIO_CH0, enumerator
H A Dintel_display_power.c1767 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) | in chv_phy_control_init()
1769 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1787 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1790 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1819 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1822 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c540 enum dpio_channel ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
548 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
552 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
2765 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2767 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2773 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2775 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()