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Searched refs:DEFINE_PROP_UINT32 (Results 1 – 25 of 289) sorted by relevance

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/openbmc/qemu/include/hw/display/
H A Dedid.h26 DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \
27 DEFINE_PROP_UINT32("yres", _state, _edid_info.prefy, 0), \
28 DEFINE_PROP_UINT32("xmax", _state, _edid_info.maxx, 0), \
29 DEFINE_PROP_UINT32("ymax", _state, _edid_info.maxy, 0), \
30 DEFINE_PROP_UINT32("refresh_rate", _state, _edid_info.refresh_rate, 0)
/openbmc/qemu/include/hw/block/
H A Dblock.h76 DEFINE_PROP_UINT32("cyls", _state, _conf.cyls, 0), \
77 DEFINE_PROP_UINT32("heads", _state, _conf.heads, 0), \
78 DEFINE_PROP_UINT32("secs", _state, _conf.secs, 0), \
79 DEFINE_PROP_UINT32("lcyls", _state, _conf.lcyls, 0), \
80 DEFINE_PROP_UINT32("lheads", _state, _conf.lheads, 0), \
81 DEFINE_PROP_UINT32("lsecs", _state, _conf.lsecs, 0)
/openbmc/qemu/hw/virtio/
H A Dvhost-user-device.c35 DEFINE_PROP_UINT32("vq_size", VHostUserBase, vq_size, 64),
36 DEFINE_PROP_UINT32("num_vqs", VHostUserBase, num_vqs, 1),
37 DEFINE_PROP_UINT32("config_size", VHostUserBase, config_size, 0),
H A Dvhost-user-blk-pci.c47 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
48 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
H A Dvirtio-blk-pci.c42 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
45 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
/openbmc/qemu/hw/misc/
H A Diotkit-sysinfo.c135 DEFINE_PROP_UINT32("SYS_VERSION", IoTKitSysInfo, sys_version, 0),
136 DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0),
137 DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0),
138 DEFINE_PROP_UINT32("IIDR", IoTKitSysInfo, iidr, 0),
H A Ddebugexit.c60 DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501),
61 DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02),
/openbmc/qemu/hw/intc/
H A Dsifive_plic.c435 DEFINE_PROP_UINT32("hartid-base", SiFivePLICState, hartid_base, 0),
437 DEFINE_PROP_UINT32("num-sources", SiFivePLICState, num_sources, 1),
438 DEFINE_PROP_UINT32("num-priorities", SiFivePLICState, num_priorities, 0),
440 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
441 DEFINE_PROP_UINT32("pending-base", SiFivePLICState, pending_base, 0),
442 DEFINE_PROP_UINT32("enable-base", SiFivePLICState, enable_base, 0),
443 DEFINE_PROP_UINT32("enable-stride", SiFivePLICState, enable_stride, 0),
444 DEFINE_PROP_UINT32("context-base", SiFivePLICState, context_base, 0),
445 DEFINE_PROP_UINT32("context-stride", SiFivePLICState, context_stride, 0),
446 DEFINE_PROP_UINT32("aperture-size", SiFivePLICState, aperture_size, 0),
H A Driscv_aclint.c266 DEFINE_PROP_UINT32("hartid-base", RISCVAclintMTimerState,
268 DEFINE_PROP_UINT32("num-harts", RISCVAclintMTimerState, num_harts, 1),
269 DEFINE_PROP_UINT32("timecmp-base", RISCVAclintMTimerState,
271 DEFINE_PROP_UINT32("time-base", RISCVAclintMTimerState,
273 DEFINE_PROP_UINT32("aperture-size", RISCVAclintMTimerState,
275 DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState,
466 DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0),
467 DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1),
468 DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false),
H A Dloongarch_pch_msi.c87 DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
88 DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0),
/openbmc/qemu/hw/usb/
H A Dhcd-uhci-pci.c119 DEFINE_PROP_UINT32("firstport", UHCIPCIState, firstport, 0),
120 DEFINE_PROP_UINT32("bandwidth", UHCIPCIState, frame_bandwidth, 1280),
121 DEFINE_PROP_UINT32("maxframes", UHCIPCIState, maxframes, 128),
125 DEFINE_PROP_UINT32("bandwidth", UHCIPCIState, frame_bandwidth, 1280),
126 DEFINE_PROP_UINT32("maxframes", UHCIPCIState, maxframes, 128),
H A Dhcd-xhci-nec.c44 DEFINE_PROP_UINT32("intrs", XHCINecState, intrs, XHCI_MAXINTRS),
45 DEFINE_PROP_UINT32("slots", XHCINecState, slots, XHCI_MAXSLOTS),
H A Dhcd-ohci-sysbus.c62 DEFINE_PROP_UINT32("num-ports", OHCISysBusState, num_ports, 3),
63 DEFINE_PROP_UINT32("firstport", OHCISysBusState, firstport, 0),
H A Dhcd-uhci-sysbus.c76 DEFINE_PROP_UINT32("firstport", UHCISysBusState, firstport, 0),
77 DEFINE_PROP_UINT32("bandwidth", UHCISysBusState, frame_bandwidth, 1280),
78 DEFINE_PROP_UINT32("maxframes", UHCISysBusState, maxframes, 128),
/openbmc/qemu/hw/ide/
H A Disa.c105 DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0),
106 DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6),
107 DEFINE_PROP_UINT32("irq", ISAIDEState, irqnum, 14),
/openbmc/qemu/hw/display/
H A Dbcm2835_fb.c433 DEFINE_PROP_UINT32("vcram-base", BCM2835FBState, vcram_base, 0),/*required*/
434 DEFINE_PROP_UINT32("vcram-size", BCM2835FBState, vcram_size,
436 DEFINE_PROP_UINT32("xres", BCM2835FBState, initial_config.xres, 640),
437 DEFINE_PROP_UINT32("yres", BCM2835FBState, initial_config.yres, 480),
438 DEFINE_PROP_UINT32("bpp", BCM2835FBState, initial_config.bpp, 16),
439 DEFINE_PROP_UINT32("pixo", BCM2835FBState,
441 DEFINE_PROP_UINT32("alpha", BCM2835FBState,
/openbmc/qemu/hw/scsi/
H A Dvhost-scsi.c349 DEFINE_PROP_UINT32("boot_tpgt", VirtIOSCSICommon, conf.boot_tpgt, 0),
350 DEFINE_PROP_UINT32("num_queues", VirtIOSCSICommon, conf.num_queues,
352 DEFINE_PROP_UINT32("virtqueue_size", VirtIOSCSICommon, conf.virtqueue_size,
356 DEFINE_PROP_UINT32("max_sectors", VirtIOSCSICommon, conf.max_sectors,
358 DEFINE_PROP_UINT32("cmd_per_lun", VirtIOSCSICommon, conf.cmd_per_lun, 128),
H A Dvhost-user-scsi.c346 DEFINE_PROP_UINT32("boot_tpgt", VirtIOSCSICommon, conf.boot_tpgt, 0),
347 DEFINE_PROP_UINT32("num_queues", VirtIOSCSICommon, conf.num_queues,
349 DEFINE_PROP_UINT32("virtqueue_size", VirtIOSCSICommon, conf.virtqueue_size,
351 DEFINE_PROP_UINT32("max_sectors", VirtIOSCSICommon, conf.max_sectors,
353 DEFINE_PROP_UINT32("cmd_per_lun", VirtIOSCSICommon, conf.cmd_per_lun, 128),
/openbmc/qemu/hw/arm/
H A Darmsse.c83 DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
84 DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
85 DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
88 DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
89 DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
96 DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
97 DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
98 DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
103 DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
104 DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
[all …]
/openbmc/qemu/hw/block/
H A Dpflash_cfi02.c942 DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, uniform_nb_blocs, 0),
943 DEFINE_PROP_UINT32("sector-length", PFlashCFI02, uniform_sector_len, 0),
944 DEFINE_PROP_UINT32("num-blocks0", PFlashCFI02, nb_blocs[0], 0),
945 DEFINE_PROP_UINT32("sector-length0", PFlashCFI02, sector_len[0], 0),
946 DEFINE_PROP_UINT32("num-blocks1", PFlashCFI02, nb_blocs[1], 0),
947 DEFINE_PROP_UINT32("sector-length1", PFlashCFI02, sector_len[1], 0),
948 DEFINE_PROP_UINT32("num-blocks2", PFlashCFI02, nb_blocs[2], 0),
949 DEFINE_PROP_UINT32("sector-length2", PFlashCFI02, sector_len[2], 0),
950 DEFINE_PROP_UINT32("num-blocks3", PFlashCFI02, nb_blocs[3], 0),
951 DEFINE_PROP_UINT32("sector-length3", PFlashCFI02, sector_len[3], 0),
/openbmc/qemu/hw/riscv/
H A Driscv_hart.c31 DEFINE_PROP_UINT32("num-harts", RISCVHartArrayState, num_harts, 1),
32 DEFINE_PROP_UINT32("hartid-base", RISCVHartArrayState, hartid_base, 0),
/openbmc/qemu/hw/char/
H A Dserial-isa.c117 DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
118 DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
119 DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb.c187 DEFINE_PROP_UINT32("index", PnvPHB, phb_id, 0),
188 DEFINE_PROP_UINT32("chip-id", PnvPHB, chip_id, 0),
189 DEFINE_PROP_UINT32("version", PnvPHB, version, 0),
306 DEFINE_PROP_UINT32("version", PnvPHBRootPort, version, 0),
/openbmc/qemu/hw/timer/
H A Dallwinner-a10-pit.c192 DEFINE_PROP_UINT32("clk0-freq", AwA10PITState, clk_freq[0], 0),
193 DEFINE_PROP_UINT32("clk1-freq", AwA10PITState, clk_freq[1], 0),
194 DEFINE_PROP_UINT32("clk2-freq", AwA10PITState, clk_freq[2], 0),
195 DEFINE_PROP_UINT32("clk3-freq", AwA10PITState, clk_freq[3], 0),
/openbmc/qemu/hw/audio/
H A Dgus.c295 DEFINE_PROP_UINT32 ("freq", GUSState, freq, 44100),
296 DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240),
297 DEFINE_PROP_UINT32 ("irq", GUSState, emu.gusirq, 7),
298 DEFINE_PROP_UINT32 ("dma", GUSState, emu.gusdma, 3),

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