/openbmc/qemu/tcg/ppc/ |
H A D | tcg-target-con-set.h | 42 C_O2_I4(r, r, rI, rZM, r, r) 43 C_O2_I4(r, r, r, r, rI, rZM)
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H A D | tcg-target.c.inc | 4275 return C_O2_I4(r, r, r, r, rI, rZM); 4278 return C_O2_I4(r, r, rI, rZM, r, r);
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/openbmc/qemu/tcg/arm/ |
H A D | tcg-target-con-set.h | 45 C_O2_I4(r, r, r, r, rIN, rIK) 46 C_O2_I4(r, r, rI, rI, rIN, rIK)
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H A D | tcg-target.c.inc | 2189 return C_O2_I4(r, r, r, r, rIN, rIK); 2191 return C_O2_I4(r, r, rI, rI, rIN, rIK);
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/openbmc/qemu/tcg/sparc64/ |
H A D | tcg-target-con-set.h | 20 C_O2_I4(r, r, rZ, rZ, rJ, rJ)
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H A D | tcg-target.c.inc | 1615 return C_O2_I4(r, r, rZ, rZ, rJ, rJ);
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/openbmc/qemu/tcg/tci/ |
H A D | tcg-target-con-set.h | 21 C_O2_I4(r, r, r, r, r, r)
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H A D | tcg-target.c.inc | 141 return C_O2_I4(r, r, r, r, r, r);
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/openbmc/qemu/tcg/riscv/ |
H A D | tcg-target-con-set.h | 23 C_O2_I4(r, r, rZ, rZ, rM, rM)
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H A D | tcg-target.c.inc | 2706 return C_O2_I4(r, r, rZ, rZ, rM, rM);
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/openbmc/qemu/tcg/mips/ |
H A D | tcg-target-con-set.h | 33 C_O2_I4(r, r, rZ, rZ, rN, rN)
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H A D | tcg-target.c.inc | 2259 return C_O2_I4(r, r, rZ, rZ, rN, rN);
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/openbmc/qemu/tcg/aarch64/ |
H A D | tcg-target-con-set.h | 37 C_O2_I4(r, r, rZ, rZ, rA, rMZ)
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H A D | tcg-target.c.inc | 3103 return C_O2_I4(r, r, rZ, rZ, rA, rMZ);
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/openbmc/qemu/tcg/ |
H A D | tcg.c | 663 #define C_O2_I4(O1, O2, I1, I2, I3, I4) C_PFX6(c_o2_i4_, O1, O2, I1, I2, I3, I4), macro 686 #undef C_O2_I4 708 #define C_O2_I4(O1, O2, I1, I2, I3, I4) { .args_ct_str = { #O1, #O2, #I1, #I2, #I3, #I4 } }, macro 730 #undef C_O2_I4 752 #define C_O2_I4(O1, O2, I1, I2, I3, I4) C_PFX6(c_o2_i4_, O1, O2, I1, I2, I3, I4) macro
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