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Searched refs:C_O2_I1 (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target-con-set.h19 C_O2_I1(r, r, r)
H A Dtcg-target.c.inc164 return TCG_TARGET_REG_BITS == 64 ? C_O1_I1(r, r) : C_O2_I1(r, r, r);
/openbmc/qemu/tcg/mips/
H A Dtcg-target-con-set.h31 C_O2_I1(r, r, r)
H A Dtcg-target.c.inc2274 return TCG_TARGET_REG_BITS == 64 ? C_O1_I1(r, r) : C_O2_I1(r, r, r);
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-con-set.h36 C_O2_I1(r, r, r)
H A Dtcg-target.c.inc3081 return C_O2_I1(r, r, r);
/openbmc/qemu/tcg/ppc/
H A Dtcg-target-con-set.h39 C_O2_I1(r, r, r)
H A Dtcg-target.c.inc4285 return TCG_TARGET_REG_BITS == 64 ? C_O1_I1(r, r) : C_O2_I1(r, r, r);
/openbmc/qemu/tcg/s390x/
H A Dtcg-target-con-set.h45 C_O2_I1(o, m, r)
H A Dtcg-target.c.inc3338 return C_O2_I1(o, m, r);
/openbmc/qemu/tcg/arm/
H A Dtcg-target-con-set.h42 C_O2_I1(e, p, q)
H A Dtcg-target.c.inc2202 return C_O2_I1(e, p, q);
/openbmc/qemu/tcg/i386/
H A Dtcg-target-con-set.h56 C_O2_I1(r, r, L)
H A Dtcg-target.c.inc3779 return TCG_TARGET_REG_BITS == 64 ? C_O1_I1(r, L) : C_O2_I1(r, r, L);
3791 return C_O2_I1(r, r, L);
/openbmc/qemu/tcg/
H A Dtcg.c660 #define C_O2_I1(O1, O2, I1) C_PFX3(c_o2_i1_, O1, O2, I1), macro
683 #undef C_O2_I1
705 #define C_O2_I1(O1, O2, I1) { .args_ct_str = { #O1, #O2, #I1 } }, macro
727 #undef C_O2_I1
749 #define C_O2_I1(O1, O2, I1) C_PFX3(c_o2_i1_, O1, O2, I1) macro