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Searched refs:C_O0_I3 (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/tcg/mips/
H A Dtcg-target-con-set.h15 C_O0_I3(rZ, r, r)
16 C_O0_I3(rZ, rZ, r)
H A Dtcg-target.c.inc2272 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(rZ, r) : C_O0_I3(rZ, r, r);
2278 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(rZ, r) : C_O0_I3(rZ, rZ, r);
/openbmc/qemu/tcg/ppc/
H A Dtcg-target-con-set.h16 C_O0_I3(r, r, r)
17 C_O0_I3(o, m, r)
H A Dtcg-target.c.inc4292 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(r, r) : C_O0_I3(r, r, r);
4294 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(r, r) : C_O0_I3(r, r, r);
4303 return C_O0_I3(o, m, r);
/openbmc/qemu/tcg/arm/
H A Dtcg-target-con-set.h17 C_O0_I3(q, q, q)
18 C_O0_I3(Q, p, q)
H A Dtcg-target.c.inc2208 return C_O0_I3(q, q, q);
2210 return C_O0_I3(Q, p, q);
/openbmc/qemu/tcg/i386/
H A Dtcg-target-con-set.h26 C_O0_I3(L, L, L)
27 C_O0_I3(s, L, L)
H A Dtcg-target.c.inc3772 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(L, L) : C_O0_I3(L, L, L);
3776 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(s, L) : C_O0_I3(s, L, L);
3784 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(L, L) : C_O0_I3(L, L, L);
3795 return C_O0_I3(L, L, L);
/openbmc/qemu/tcg/tci/
H A Dtcg-target-con-set.h14 C_O0_I3(r, r, r)
H A Dtcg-target.c.inc170 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(r, r) : C_O0_I3(r, r, r);
172 return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(r, r) : C_O0_I3(r, r, r);
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target-con-set.h21 C_O0_I3(r, r, r)
H A Dtcg-target.c.inc2211 return C_O0_I3(r, r, r);
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-con-set.h16 C_O0_I3(rZ, rZ, r)
H A Dtcg-target.c.inc3089 return C_O0_I3(rZ, rZ, r);
/openbmc/qemu/tcg/s390x/
H A Dtcg-target-con-set.h20 C_O0_I3(o, m, r)
H A Dtcg-target.c.inc3341 return C_O0_I3(o, m, r);
/openbmc/qemu/tcg/
H A Dtcg.c648 #define C_O0_I3(I1, I2, I3) C_PFX3(c_o0_i3_, I1, I2, I3), macro
674 #undef C_O0_I3
693 #define C_O0_I3(I1, I2, I3) { .args_ct_str = { #I1, #I2, #I3 } }, macro
718 #undef C_O0_I3
737 #define C_O0_I3(I1, I2, I3) C_PFX3(c_o0_i3_, I1, I2, I3) macro