CSR_STIMECMPH (reference) in projects: openbmc

Searched refs:CSR_STIMECMPH (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clocksource/
H A D	timer-riscv.c	`43 csr_write(CSR_STIMECMPH, next_tval >> 32); in riscv_clock_next_event()`
/openbmc/linux/arch/riscv/include/asm/
H A D	csr.h	`287 #define CSR_STIMECMPH 0x15D 286 #define CSR_STIMECMPH global() macro`
/openbmc/qemu/target/riscv/
H A D	cpu_bits.h	`215 #define CSR_STIMECMPH 0x15D macro`
H A D	csr.c	`5174 [CSR_STIMECMPH] = { "stimecmph", sstc_32, read_stimecmph, write_stimecmph,`