Home
last modified time | relevance | path

Searched refs:CSR_STIMECMP (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clocksource/
H A Dtimer-riscv.c42 csr_write(CSR_STIMECMP, next_tval & 0xFFFFFFFF); in riscv_clock_next_event()
45 csr_write(CSR_STIMECMP, next_tval); in riscv_clock_next_event()
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h286 #define CSR_STIMECMP 0x14D
285 #define CSR_STIMECMP global() macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h214 #define CSR_STIMECMP 0x14D macro
H A Dcsr.c5172 [CSR_STIMECMP] = { "stimecmp", sstc, read_stimecmp, write_stimecmp,