Home
last modified time | relevance | path

Searched refs:CSR_SSTATEEN1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h202 #define CSR_SSTATEEN1 0x10D macro
H A Dcsr.c5147 [CSR_SSTATEEN1] = { "sstateen1", sstateen, read_sstateen,