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Searched refs:CSR_SEPC (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/riscv/kernel/
H A Dkexec_relocate.S139 csrw CSR_SEPC, zero
203 csrw CSR_SEPC, zero
/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_switch.S67 csrw CSR_SEPC, t5
160 csrr t0, CSR_SEPC
221 csrr a1, CSR_SEPC
224 csrw CSR_SEPC, a1
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h280 #define CSR_SEPC 0x141
428 # define CSR_EPC CSR_SEPC
279 #define CSR_SEPC global() macro
/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h182 #define CSR_SEPC 0x141 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h208 #define CSR_SEPC 0x141 macro
H A Dcpu.c784 CSR_SEPC, in riscv_cpu_dump_state()
H A Dcsr.c5168 [CSR_SEPC] = { "sepc", smode, read_sepc, write_sepc },