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Searched refs:CSR_PMPCFG1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h230 #define CSR_PMPCFG1 0x3a1 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h336 #define CSR_PMPCFG1 0x3a1 macro
H A Dcsr.c5291 [CSR_PMPCFG1] = { "pmpcfg1", pmp, read_pmpcfg, write_pmpcfg },