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Searched refs:CSR_PMPADDR4 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h237 #define CSR_PMPADDR4 0x3b4 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h343 #define CSR_PMPADDR4 0x3b4 macro
H A Dcsr.c5298 [CSR_PMPADDR4] = { "pmpaddr4", pmp, read_pmpaddr, write_pmpaddr },