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Searched refs:CSR_PMPADDR10 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h243 #define CSR_PMPADDR10 0x3ba macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h349 #define CSR_PMPADDR10 0x3ba macro
H A Dcsr.c5309 [CSR_PMPADDR10] = { "pmpaddr10", pmp, read_pmpaddr, write_pmpaddr },