Home
last modified time | relevance | path

Searched refs:CSR_MSTATEEN2 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h313 #define CSR_MSTATEEN2 0x30E macro
H A Dcsr.c5110 [CSR_MSTATEEN2] = { "mstateen2", mstateen, read_mstateen,