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Searched refs:CSR_MHPMEVENT8H (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h445 #define CSR_MHPMEVENT8H 0x728 macro
H A Dcsr.c5520 [CSR_MHPMEVENT8H] = { "mhpmevent8h", sscofpmf_32, read_mhpmeventh,