Searched refs:CSR_MHPMEVENT5H (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/riscv/ | ||
| H A D | cpu_bits.h | 442 #define CSR_MHPMEVENT5H 0x725 macro |
| H A D | csr.c | 5511 [CSR_MHPMEVENT5H] = { "mhpmevent5h", sscofpmf_32, read_mhpmeventh, |