Home
last modified time | relevance | path

Searched refs:CSR_MHPMEVENT31 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h223 #define CSR_MHPMEVENT31 0x33f macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h435 #define CSR_MHPMEVENT31 0x33f macro
H A Dcsr.c5495 [CSR_MHPMEVENT31] = { "mhpmevent31", any, read_mhpmevent,