Home
last modified time | relevance | path

Searched refs:CSR_MHPMEVENT26 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h218 #define CSR_MHPMEVENT26 0x33a macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h430 #define CSR_MHPMEVENT26 0x33a macro
H A Dcsr.c5485 [CSR_MHPMEVENT26] = { "mhpmevent26", any, read_mhpmevent,