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Searched refs:CSR_MHPMEVENT24 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h216 #define CSR_MHPMEVENT24 0x338 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h428 #define CSR_MHPMEVENT24 0x338 macro
H A Dcsr.c5481 [CSR_MHPMEVENT24] = { "mhpmevent24", any, read_mhpmevent,