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Searched refs:CSR_MHPMEVENT21 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h213 #define CSR_MHPMEVENT21 0x335 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h425 #define CSR_MHPMEVENT21 0x335 macro
H A Dcsr.c5475 [CSR_MHPMEVENT21] = { "mhpmevent21", any, read_mhpmevent,