Searched refs:CSR_MHPMEVENT15H (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/riscv/ | ||
H A D | cpu_bits.h | 452 #define CSR_MHPMEVENT15H 0x72f macro |
H A D | csr.c | 5541 [CSR_MHPMEVENT15H] = { "mhpmevent15h", sscofpmf_32, read_mhpmeventh, |