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Searched refs:CSR_MHPMCOUNTER27H (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h315 #define CSR_MHPMCOUNTER27H 0xb9b macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h494 #define CSR_MHPMCOUNTER27H 0xb9b macro
H A Dcsr.c5671 [CSR_MHPMCOUNTER27H] = { "mhpmcounter27h", mctr32, read_hpmcounterh,