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Searched refs:CSR_MHPMCOUNTER10 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h267 #define CSR_MHPMCOUNTER10 0xb0a macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h377 #define CSR_MHPMCOUNTER10 0xb0a macro
H A Dcsr.c5383 [CSR_MHPMCOUNTER10] = { "mhpmcounter10", mctr, read_hpmcounter,