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Searched refs:CSCR_MPLL_RESTART (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/armadeus/apf27/
H A Dlowlevel_init.S43 write32 CSCR, ACFG_CSCR_VAL|CSCR_MPLL_RESTART|CSCR_SPLL_RESTART
/openbmc/u-boot/arch/arm/include/asm/arch-mx27/
H A Dimx-regs.h241 #define CSCR_MPLL_RESTART (1 << 18) macro
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h94 #define CSCR_MPLL_RESTART (1<<21) macro