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Searched refs:CR3 (Results 1 – 20 of 20) sorted by relevance

/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c78 REG32(CR3, 0x08)
80 FIELD(CR3, UCESM, 23, 1) /* USART Clock Enable in Stop Mode */
81 FIELD(CR3, WUFIE, 22, 1) /* Wakeup from Stop mode interrupt enable */
82 FIELD(CR3, WUS, 20, 2) /* Wakeup from Stop mode interrupt flag selection */
83 FIELD(CR3, SCARCNT, 17, 3) /* Smartcard auto-retry count */
84 FIELD(CR3, DEP, 15, 1) /* Driver enable polarity selection */
85 FIELD(CR3, DEM, 14, 1) /* Driver enable mode */
86 FIELD(CR3, DDRE, 13, 1) /* DMA Disable on Reception Error */
87 FIELD(CR3, OVRDIS, 12, 1) /* Overrun Disable */
88 FIELD(CR3, ONEBIT, 11, 1) /* One sample bit method enable */
[all …]
/openbmc/u-boot/board/renesas/sh7752evb/
H A Dspi-boot.c29 #define CR3 0xFE002018 macro
69 spi_write(0x00, CR3); in spi_reset()
96 spi_write(0xff, CR3); in spi_read_flash()
/openbmc/u-boot/board/renesas/sh7753evb/
H A Dspi-boot.c25 #define CR3 0xFE002018 macro
74 spi_write(0x00, CR3); in spi_reset()
109 spi_write(0xff, CR3); in spi_read_flash()
/openbmc/u-boot/board/renesas/sh7757lcr/
H A Dspi-boot.c33 #define CR3 0xFE002018 macro
91 spi_write(0xff, CR3); in spi_read_flash()
/openbmc/linux/Documentation/arch/x86/
H A Dpti.rst43 that any missed kernel->user CR3 switch will immediately crash
79 a. CR3 manipulation to switch between the page table copies
82 though.) Moves to CR3 are on the order of a hundred
97 tables by setting a special bit in CR3 when the page tables
116 g. On systems without PCID support, each CR3 write flushes
124 single kernel address flush will require a TLB-flushing CR3
129 1. We can be more careful about not actually writing to CR3
188 CR3 before calling into C functions which are not pti-mapped.
/openbmc/linux/arch/x86/kernel/
H A Drelocate_kernel_64.S34 #define CR3 DATA(0x10) macro
71 movq %rax, CR3(%r11)
240 movq CR3(%r8), %rax
H A Drelocate_kernel_32.S30 #define CR3 DATA(0x8) macro
55 movl %eax, CR3(%edi)
208 movl CR3(%edi), %eax
/openbmc/linux/arch/powerpc/include/uapi/asm/
H A Dtermbits.h91 #define CR3 0x03000 macro
/openbmc/linux/include/uapi/asm-generic/
H A Dtermbits.h77 #define CR3 0x00600 macro
/openbmc/linux/arch/parisc/include/uapi/asm/
H A Dtermbits.h77 #define CR3 0x00600 macro
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_usart-test.c33 REG32(CR3, 0x08)
34 FIELD(CR3, OVRDIS, 12, 1)
/openbmc/linux/arch/alpha/include/uapi/asm/
H A Dtermbits.h96 #define CR3 0x03000 macro
/openbmc/linux/arch/mips/include/uapi/asm/
H A Dtermbits.h97 #define CR3 0x00600 macro
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dtermbits.h94 #define CR3 0x00600 macro
/openbmc/linux/drivers/dma/
H A Dpl330.c135 #define CR3 0xe0c macro
1861 pl330->pcfg.irq_ns = readl(regs + CR3); in read_dmac_config()
/openbmc/linux/Documentation/networking/
H A Darcnet-hardware.rst598 | ___ ___ CR3 |___|
629 CR3/CR4 Diagnostic LEDs
808 > CR3 |___|
836 CR3 Green Monitors Network Activity
/openbmc/qemu/hw/net/can/
H A Dxlnx-versal-canfd.c266 FIELD(TX_BUFFER_CANCEL_REQUEST_REGISTER, CR3, 3, 1)
/openbmc/qemu/linux-user/
H A Dstrace.c1409 ENUM_TARGET(CR3),
H A Dsyscall.c5718 { TARGET_CRDLY, TARGET_CR3, CRDLY, CR3 },
/openbmc/libcper/specification/document/
H A Dcper-json-specification.tex609 cr3 & uint64 & The CR3 register. Real maximum is \texttt{UINT32}, null extended to \texttt{UINT64}.…
681 cr3 & uint64 & The CR3 register.\\