| /openbmc/qemu/hw/char/ |
| H A D | stm32l4x5_usart.c | 57 REG32(CR2, 0x04)
58 FIELD(CR2, ADD_1, 28, 4) /* ADD[7:4] */
59 FIELD(CR2, ADD_0, 24, 4) /* ADD[3:0] */
60 FIELD(CR2, RTOEN, 23, 1) /* Receiver timeout enable */
61 FIELD(CR2, ABRMOD, 21, 2) /* Auto baud rate mode */
62 FIELD(CR2, ABREN, 20, 1) /* Auto baud rate enable */
63 FIELD(CR2, MSBFIRST, 19, 1) /* Most significant bit first */
64 FIELD(CR2, DATAINV, 18, 1) /* Binary data inversion */
65 FIELD(CR2, TXINV, 17, 1) /* TX pin active level inversion */
66 FIELD(CR2, RXINV, 16, 1) /* RX pin active level inversion */
[all …]
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| /openbmc/u-boot/board/renesas/sh7757lcr/ |
| H A D | spi-boot.c | 32 #define CR2 0xFE002010 macro
74 spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ in spi_reset()
75 spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); in spi_reset()
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| /openbmc/u-boot/board/renesas/sh7752evb/ |
| H A D | spi-boot.c | 28 #define CR2 0xFE002010 macro
77 spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ in spi_reset()
78 spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); in spi_reset()
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| /openbmc/u-boot/board/renesas/sh7753evb/ |
| H A D | spi-boot.c | 24 #define CR2 0xFE002010 macro
82 spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ in spi_reset()
83 spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); in spi_reset()
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| /openbmc/linux/net/ethtool/ |
| H A D | common.c | 146 __DEFINE_LINK_MODE_NAME(50000, CR2, Full),
171 __DEFINE_LINK_MODE_NAME(100000, CR2, Full),
196 __DEFINE_LINK_MODE_NAME(200000, CR2, Full),
309 __DEFINE_LINK_MODE_PARAMS(50000, CR2, Full),
334 __DEFINE_LINK_MODE_PARAMS(100000, CR2, Full),
359 __DEFINE_LINK_MODE_PARAMS(200000, CR2, Full),
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| /openbmc/linux/arch/powerpc/include/uapi/asm/ |
| H A D | termbits.h | 90 #define CR2 0x02000 macro
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| /openbmc/linux/include/uapi/asm-generic/ |
| H A D | termbits.h | 76 #define CR2 0x00400 macro
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| /openbmc/linux/arch/parisc/include/uapi/asm/ |
| H A D | termbits.h | 76 #define CR2 0x00400 macro
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| /openbmc/linux/arch/alpha/include/uapi/asm/ |
| H A D | termbits.h | 95 #define CR2 0x02000 macro
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| /openbmc/linux/arch/mips/include/uapi/asm/ |
| H A D | termbits.h | 96 #define CR2 0x00400 macro
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| /openbmc/linux/arch/sparc/include/uapi/asm/ |
| H A D | termbits.h | 93 #define CR2 0x00400 macro
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| /openbmc/qemu/tests/qtest/ |
| H A D | stm32l4x5_usart-test.c | 32 REG32(CR2, 0x04)
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| /openbmc/qemu/hw/arm/ |
| H A D | smmuv3-internal.h | 127 REG32(CR2, 0x2c)
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| /openbmc/linux/Documentation/powerpc/ |
| H A D | papr_hcalls.rst | 90 | CR2-4 | N | Condition register fields. |
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| /openbmc/linux/Documentation/arch/x86/ |
| H A D | exception-tables.rst | 43 control register CR2. If the address is within the virtual address
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| /openbmc/linux/Documentation/virt/kvm/x86/ |
| H A D | msr.rst | 220 #PF exception. During delivery of these events APF CR2 register contains
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| /openbmc/qemu/hw/net/can/ |
| H A D | xlnx-versal-canfd.c | 267 FIELD(TX_BUFFER_CANCEL_REQUEST_REGISTER, CR2, 2, 1)
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| /openbmc/linux/drivers/dma/ |
| H A D | pl330.c | 134 #define CR2 0xe08 macro
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| /openbmc/qemu/linux-user/ |
| H A D | strace.c | 1408 ENUM_TARGET(CR2),
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| H A D | syscall.c | 5719 { TARGET_CRDLY, TARGET_CR2, CRDLY, CR2 },
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| /openbmc/libcper/specification/document/ |
| H A D | cper-json-specification.tex | 607 cr2 & uint64 & The CR2 register. Real maximum is \texttt{UINT32}, null extended to \texttt{UINT64}.…
679 cr2 & uint64 & The CR2 register.\\
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| /openbmc/linux/Documentation/virt/kvm/ |
| H A D | api.rst | 7314 With this capability enabled, CR2 will not be modified prior to the
|