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Searched refs:CP0C5_UFE (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc447 (1 << CP0C5_MSAEn) | (1 << CP0C5_UFE) |
488 .CP0_Config5_rw_bitmask = (1 << CP0C5_MSAEn) | (1 << CP0C5_UFE) |
530 (1 << CP0C5_UFE),
762 (1 << CP0C5_FRE) | (1 << CP0C5_UFE),
802 (1 << CP0C5_FRE) | (1 << CP0C5_UFE),
913 (1 << CP0C5_MSAEn) | (1 << CP0C5_UFE) |
H A Dcpu.h945 #define CP0C5_UFE 9 macro
H A Dkvm.c403 (1U << CP0C5_UFE) | \
/openbmc/qemu/target/mips/tcg/
H A Dfpu_helper.c62 if (env->CP0_Config5 & (1 << CP0C5_UFE)) { in helper_cfc1()
120 if (env->CP0_Config5 & (1 << CP0C5_UFE)) { in helper_ctc1()
132 if (env->CP0_Config5 & (1 << CP0C5_UFE)) { in helper_ctc1()