Searched refs:CP0C5_MI (Results 1 – 5 of 5) sorted by relevance
85 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_helper_tlbinv()115 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_helper_tlbwi()171 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_helper_tlbp()234 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_helper_tlbr()396 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_map_address()1366 bool mi = !!((env->CP0_Config5 >> CP0C5_MI) & 1); in r4k_invalidate_tlb()
1279 env->CP0_EntryHi_ASID_mask = (env->CP0_Config5 & (1 << CP0C5_MI)) ? in helper_mtc0_config5()1337 if ((env->CP0_Config5 >> CP0C5_MI) & 1) { in helper_mtc0_watchhi()
939 #define CP0C5_MI 17 macro
302 env->CP0_EntryHi_ASID_mask = (env->CP0_Config5 & (1 << CP0C5_MI)) ? in mips_cpu_reset_hold()
15095 ctx->mi = (env->CP0_Config5 >> CP0C5_MI) & 1; in mips_tr_init_disas_context()