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Searched refs:CONFIG_SYS_PCIE1_MEM_VIRT (Results 1 – 25 of 54) sorted by relevance

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/openbmc/u-boot/board/varisys/cyrus/
H A Dtlb.c59 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
64 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/openbmc/u-boot/board/freescale/t4rdb/
H A Dtlb.c55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
65 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/openbmc/u-boot/board/freescale/common/p_corenet/
H A Dtlb.c94 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
99 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
104 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/openbmc/u-boot/board/freescale/t4qds/
H A Dtlb.c68 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
73 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
78 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/openbmc/u-boot/include/configs/
H A DMPC8641HPCN.h285 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
291 #define CONFIG_SYS_PCIE1_MEM_BUS CONFIG_SYS_PCIE1_MEM_VIRT
292 #define CONFIG_SYS_PCIE1_MEM_PHYS_LOW CONFIG_SYS_PCIE1_MEM_VIRT
318 #define CONFIG_SYS_PCIE2_MEM_VIRT (CONFIG_SYS_PCIE1_MEM_VIRT \
450 #define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_1G \
H A Dsbc8641d.h262 #define CONFIG_SYS_PCIE1_MEM_VIRT CONFIG_SYS_PCIE1_MEM_BUS macro
348 #define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
H A Dt4qds.h153 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
H A Dcontrolcenterd.h209 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 macro
H A DMPC8568MDS.h243 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 macro
/openbmc/u-boot/board/gdsys/p1022/
H A Dtlb.c52 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000,
/openbmc/u-boot/board/freescale/mpc8569mds/
H A Dtlb.c60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
68 SET_TLB_ENTRY(1, (CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000),
/openbmc/u-boot/board/freescale/b4860qds/
H A Dtlb.c66 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
70 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000,
/openbmc/u-boot/board/freescale/p1_twr/
H A Dtlb.c54 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/Arcturus/ucp1020/
H A Dtlb.c52 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/p1010rdb/
H A Dtlb.c55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/c29xpcie/
H A Dtlb.c38 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dtlb.c60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/keymile/kmp204x/
H A Dtlb.c50 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t1040qds/
H A Dtlb.c56 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dtlb.c48 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t102xrdb/
H A Dtlb.c57 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t102xqds/
H A Dtlb.c57 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dtlb.c70 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t208xqds/
H A Dtlb.c69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/openbmc/u-boot/board/freescale/t208xrdb/
H A Dtlb.c69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,

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