| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 126 FACTOR1(CLK_TOP_UNIVPLL3_D4, CLK_TOP_UNIVPLL, 1, 20),
201 CLK_TOP_UNIVPLL3_D4,
217 CLK_TOP_UNIVPLL3_D4,
297 CLK_TOP_UNIVPLL3_D4,
333 CLK_TOP_UNIVPLL3_D4,
|
| H A D | clk-mt7623.c | 136 FACTOR1(CLK_TOP_UNIVPLL3_D4, CLK_TOP_UNIVPLL_D5, 1, 4),
274 CLK_TOP_UNIVPLL3_D4
303 CLK_TOP_UNIVPLL3_D4,
365 CLK_TOP_UNIVPLL3_D4,
382 CLK_TOP_UNIVPLL3_D4,
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 63 #define CLK_TOP_UNIVPLL3_D4 50 macro
|
| H A D | mt7623-clk.h | 62 #define CLK_TOP_UNIVPLL3_D4 49 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 60 #define CLK_TOP_UNIVPLL3_D4 50 macro
|
| H A D | mt7622-clk.h | 54 #define CLK_TOP_UNIVPLL3_D4 42 macro
|
| H A D | mt6797-clk.h | 77 #define CLK_TOP_UNIVPLL3_D4 67 macro
|
| H A D | mediatek,mt6795-clk.h | 80 #define CLK_TOP_UNIVPLL3_D4 69 macro
|
| H A D | mt8173-clk.h | 82 #define CLK_TOP_UNIVPLL3_D4 72 macro
|
| H A D | mt6765-clk.h | 67 #define CLK_TOP_UNIVPLL3_D4 32 macro
|
| H A D | mediatek,mt8365-clk.h | 42 #define CLK_TOP_UNIVPLL3_D4 32 macro
|
| H A D | mt2712-clk.h | 66 #define CLK_TOP_UNIVPLL3_D4 35 macro
|
| H A D | mt2701-clk.h | 45 #define CLK_TOP_UNIVPLL3_D4 35 macro
|
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 436 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univ_249p6m", 1, 4, 0),
|
| H A D | clk-mt8173-topckgen.c | 515 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univ_249p6m", 1, 4, 0),
|
| H A D | clk-mt7622.c | 296 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll", 1, 20),
|
| H A D | clk-mt7629.c | 403 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll", 1, 20),
|
| H A D | clk-mt6797.c | 57 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll_d5", 1, 4),
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| H A D | clk-mt2712.c | 74 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll_d5", 1, 4),
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| H A D | clk-mt8365.c | 61 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll", 1, 20),
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| H A D | clk-mt6765.c | 117 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll_d5", 1, 4),
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| H A D | clk-mt2701.c | 93 FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll_d5", 1, 4),
|